As a result of the continuous developments in integrated circuits (ICs), the flip-flops contribute to a substantial portion of any circuit design's power. The various units of an IC that consume power are logic implementation, flip flops, RAM, clock tree and integrated clock gating (ICG) cells. The comparison of the power consumption by the various units is as follows; logic implementation 29%, flip-flops 27%, RAM 18%, clock tree 16% and the ICG consumes 10% of the total power in a typical design. In digital designs, the flip-flops form 20-40% of the digital sub-chips.
The majority of power inside a flip-flop is consumed by the transistors receiving a clock input, since the data activity factors are typically much lower. Irrespective of whether the data changes every cycle or not, the transistors receiving the clock input keep switching at every clock cycle. Thus, it is apparent that with reduced transistor count, the power consumed by the flip-flop can also be reduced. Further, clock power in flip-flops is critical to overall digital power consumption. The clock power consumption is due to tedious synchronization of the various clock phases and routing of these clock signals within flip-flops. It is apparent that a reduction in area of flip-flops will directly improve overall digital power consumption.